2025-04-06 06:51:00Z.869453 |
2025-04-06 06:51:00Z.882844 |
@@@initial::request@@@ |
{"back": "https://fpga-vision-lab.h-brs.de/weblab/labs/C%20V%20FPGA%20experiments/C%20V%20Demo/?finished=true"} |
N/A |
2025-04-06 06:51:00Z.869453 |
2025-04-06 06:51:00Z.882844 |
@@@initial::response@@@ |
CV1 |
N/A |
2025-04-06 06:51:01Z.588382 |
2025-04-06 06:51:02Z.602237 |
sw0_off |
command received switch00 |
N/A |
2025-04-06 06:51:02Z.602688 |
2025-04-06 06:51:03Z.620914 |
image_home |
command received img_home |
N/A |
2025-04-06 06:51:03Z.621777 |
2025-04-06 06:51:04Z.640397 |
sw1_off |
command received switch10 |
N/A |
2025-04-06 06:51:04Z.641428 |
2025-04-06 06:51:05Z.656715 |
sw2_off |
command received switch20 |
N/A |
2025-04-06 06:51:13Z.266380 |
2025-04-06 06:51:14Z.280120 |
image_end |
command received img_end_ |
N/A |
2025-04-06 06:51:14Z.280907 |
2025-04-06 06:51:15Z.301178 |
image_home |
command received img_home |
N/A |
2025-04-06 06:51:15Z.305729 |
2025-04-06 06:51:16Z.321710 |
image_home |
command received img_home |
N/A |
2025-04-06 06:51:16Z.322114 |
2025-04-06 06:51:17Z.341277 |
image_home |
command received img_home |
N/A |
2025-04-06 06:51:17Z.341843 |
2025-04-06 06:51:18Z.362522 |
image_end |
command received img_end_ |
N/A |
2025-04-06 06:51:18Z.366810 |
2025-04-06 06:51:19Z.384141 |
image_end |
command received img_end_ |
N/A |
2025-04-06 06:51:19Z.384677 |
2025-04-06 06:51:20Z.400382 |
image_end |
command received img_end_ |
N/A |
2025-04-06 06:51:20Z.582983 |
2025-04-06 06:51:30Z.658384 |
@@@finish@@@ |
None |
N/A |